Abstract
Network-on-chip multicore architectures with a large number of processing elements are becoming a reality with the recent developments in technology. In these modern systems the processing elements are interconnected with regular network-on-chip (NoC) topologies such as meshes and trees. In this paper we propose a parallel Gauss-Seidel (GS) iterative algorithm for solving large systems of linear equations on a torus NoC architecture. The proposed parallel algorithm is O(Nn2/k2) time complexity for solving a system with matrix of order n on a k × k torus NoC architecture with N iterations assuming n and N are large compared to k (i.e. for large linear systems that require a large number of iterations). We show that under these conditions the proposed parallel GS algorithm has near optimal speedup.
Original language | English |
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Article number | 1250001 |
Journal | Journal of Interconnection Networks |
Volume | 13 |
Issue number | 1-2 |
DOIs | |
Publication status | Published - 2012 |
Keywords
- Gauss-Seidel
- Network-on-chip
- iterative method
- linear system of equations
- torus, parallel algorithm
ASJC Scopus subject areas
- Computer Networks and Communications