On Implementation of Reconfigurable Cyclic Redundancy Check for EVS Applications

The rising of Internet of Things (IoTs), Unmanned Aerial Vehicles (UAVs), 5G/6G technologies, and many other technologies, render the need for high-speed, low footprint implementation of Cyclic Redundancy Check (CRC) versions their Embedded Vision Systems (EVSs). However, the performance of a CRC architecture need to be mapped in terms of Hamming Distance (HD), area, memory, power dissipation and execution time. In addition, each of the terms depend on certain factors such as the data word size, sparse and dense nature of the data, the CRC length, the seed, the CRC characteristic polynomial and the operational frequency. In this paper, we investigate one specific factor that may potentially affect the execution time. This factor is the selection of a characteristic polynomial for a CRC implementation. The method used to investigate this aspect we developed an exhaustive code that iterates over all the chosen CRC types, finds all the primitive connection polynomials, calculate the CRC of different data word sizes against every determined characteristic polynomials and stamp the time. Then finally analyze the results and present the concluded findings. A thorough investigation was carried out on one of the performance factors ie the selection of CRC characteristic polynomial. Based on employed methodology and algorithms we found that the execution time is doubled whenever the data word size is doubled, the execution time increases whenever the CRC type increases, and most importantly, the execution time of any characteristic polynomial within the same CRC type will most probably have the same execution time.