HW/SW design-based implementation of vector median rational hybrid filter

Anis Boudabous*, Ahmed Ben Atitallah, Lazhar Khriji, Patrice Kadionik, Nouri Masmoudi

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

7 Citations (Scopus)


A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering problems. This filter is used essentially to remove impulsive and Gaussian noise in colour images. In our design we start by implementing the software solution in system on programmable chip context using NIOS-II softcore processor and μClinux as operating system. We evaluate the execution time of the whole filtering process. Than we add a hardware accelerator part. This latter is implemented using fast parallel architecture. Compared to the software solution results, the use of the hardware accelerator improves clearly the filtering speed and maintains the good filtering quality as shown by simulations.

Original languageEnglish
Pages (from-to)70-74
Number of pages5
JournalInternational Arab Journal of Information Technology
Issue number1
Publication statusPublished - Jan 2010


  • Co-design
  • Filtering
  • Fpga implementation
  • Nios-ii processor
  • SoPC

ASJC Scopus subject areas

  • General Computer Science


Dive into the research topics of 'HW/SW design-based implementation of vector median rational hybrid filter'. Together they form a unique fingerprint.

Cite this