High-performance optical receivers using conventional sub-micron CMOS technology for optical communication applications

F. Touati*, S. Douss, N. Elfadil, Z. Nadir, M. B. Suwailam, M. Loulou

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review


A novel sub-micron total-CMOS common-gate Transimpedance Amplifier (TIA) has been designed for high-speed optical communication applications. This total-CMOS approach has given a tremendous flexibility in optimizing the circuit for high performance. The new design shows superior performance compared to recent common-gate and common-base TIAs. Using conventional 0.8 μm CMOS process parameters, simulations showed a transimpedance gain of 69.0 dB over a 3.5 GHz bandwidth, approaching the technology fT of 10 GHz. The mean input referred noise current density was calculated to be 21.2 pA/Hz0.5 at 3.5 GHz, giving an input optical sensitivity of -20.4 dBm for a BER of 10-9. This allows a data transmission easily at 2.5 Gbps for a NRZ synchronous link. The power consumption is only 44 mW when AC coupled to a 50 Ω load. In addition, the TIA was designed to tolerate a relatively wide variation in bias conditions while preserving stability. Moreover, simulations using a 0.6 μm CMOS process showed even lower noise and wider bandwidth now at 6.0 GHz. The new design approaches similar IC designs in Si-bipolar or GaAs technologies. The design is the first reported TIA, which combines such features and using conventional 0.8 μm CMOS transistors with fT = 10 GHz.

Original languageEnglish
Pages (from-to)559-564
Number of pages6
JournalJournal of Applied Sciences
Issue number4
Publication statusPublished - Feb 15 2007


  • CMOS technology
  • Low noise
  • Low power
  • Optical receiver
  • Transimpedance gain

ASJC Scopus subject areas

  • General


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