Complex binary adder designs and their hardware implementations

Tariq Jamil; Medhat Awadalla; Iftaquaruddin Mohammed

doi:10.14569/ijacsa.2019.0100734

Complex binary adder designs and their hardware implementations

Tariq Jamil, Medhat Awadalla, Iftaquaruddin Mohammed

Electrical and Computer Engineering

Research output: Contribution to journal › Article › peer-review

1 Citation (Scopus)

Abstract

Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.

Original language	English
Pages (from-to)	252-260
Number of pages	9
Journal	International Journal of Advanced Computer Science and Applications
Volume	10
Issue number	7
DOIs	https://doi.org/10.14569/ijacsa.2019.0100734
Publication status	Published - 2019

Keywords

Adder
Complex binary
Complex number
Decoder
Minimum delay
Ripple carry

ASJC Scopus subject areas

Computer Science(all)

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10.14569/ijacsa.2019.0100734

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title = "Complex binary adder designs and their hardware implementations",

abstract = "Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.",

keywords = "Adder, Complex binary, Complex number, Decoder, Minimum delay, Ripple carry",

author = "Tariq Jamil and Medhat Awadalla and Iftaquaruddin Mohammed",

note = "Funding Information: ACKNOWLEDGMENT We gratefully acknowledge the support provided by Sultan Qaboos University through Internal Research Grant No. IG/ENG/IENG/16/03 in facilitating and encouraging an environment conducive to research and academic excellence in the Sultanate of Oman.",

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AU - Awadalla, Medhat

AU - Mohammed, Iftaquaruddin

N1 - Funding Information: ACKNOWLEDGMENT We gratefully acknowledge the support provided by Sultan Qaboos University through Internal Research Grant No. IG/ENG/IENG/16/03 in facilitating and encouraging an environment conducive to research and academic excellence in the Sultanate of Oman.

PY - 2019

Y1 - 2019

N2 - Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.

AB - Complex Binary Number System (CBNS) is (-1+j)-based on binary number system which facilitates both real and imaginary components of a complex number to be represented as single binary number. In this paper, we have presented three designs of nibble-size complex binary adders (ripple-carry, decoder-based, minimum-delay) and implemented them on various Xilinx FPGAs. The designs of base2 4-bit binary adder have also been implemented so that statistics of different adders can be compared.

KW - Adder

KW - Complex binary

KW - Complex number

KW - Decoder

KW - Minimum delay

KW - Ripple carry

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Complex binary adder designs and their hardware implementations

Abstract

Keywords

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