TY - GEN
T1 - Communication modelling of the spidergon NoC with virtual channels
AU - Moadeli, M.
AU - Shahrabi, A.
AU - Vanderbauwhede, W.
AU - Ould-Khaoua, M.
PY - 2007
Y1 - 2007
N2 - The spidergon scheme is a commercial NoC (Network On-Chip) proposed recently to address the demand for a fixed and optimized topology to realize cost effective multi-processor SoC (MPSoC) development [12]. The increasing diversity of the applications quality of service requirements may, however, inhibit employing a particular architecture for a wide range of applications, unless the performance it delivers is improved. A traditional approach to enhance the performance of the interconnect networks has been employing the virtual channels. In this paper, we present an analytical model to evaluate the performance of the spidergon NoC and to study the effect of employing virtual channels. Results obtained through simulation experiments show that the model exhibits a good degree of accuracy in predicting average message latency under various working conditions.
AB - The spidergon scheme is a commercial NoC (Network On-Chip) proposed recently to address the demand for a fixed and optimized topology to realize cost effective multi-processor SoC (MPSoC) development [12]. The increasing diversity of the applications quality of service requirements may, however, inhibit employing a particular architecture for a wide range of applications, unless the performance it delivers is improved. A traditional approach to enhance the performance of the interconnect networks has been employing the virtual channels. In this paper, we present an analytical model to evaluate the performance of the spidergon NoC and to study the effect of employing virtual channels. Results obtained through simulation experiments show that the model exhibits a good degree of accuracy in predicting average message latency under various working conditions.
UR - http://www.scopus.com/inward/record.url?scp=47249125808&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=47249125808&partnerID=8YFLogxK
U2 - 10.1109/ICPP.2007.28
DO - 10.1109/ICPP.2007.28
M3 - Conference contribution
AN - SCOPUS:47249125808
SN - 076952933X
SN - 9780769529332
T3 - Proceedings of the International Conference on Parallel Processing
SP - 76
BT - 2007 International Conference on Parallel Processing, ICPP
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 36th International Conference on Parallel Processing in Xi'an, ICPP
Y2 - 10 September 2007 through 14 September 2007
ER -